Basic Product Information
Part Number: MC74AC04DG
| Field |
Value |
| Manufacturer |
onsemi |
| Device Type |
MC74AC04DG – Hex Inverter (6-Channel CMOS) |
| Package |
SOIC-14 |
| Compliance |
RoHS Compliant, Halogen Free, Lead Free |
| Grade |
Industrial |
Core Electrical Parameters
| Parameter |
Value |
Unit |
| Logic Family |
74AC |
— |
| Number of Gates / Circuits |
6 |
— |
| Number of Inputs per Gate |
1 |
— |
| Supply Voltage Range |
2 – 6 |
V |
| Nominal Supply Voltage |
5 |
V |
| Output Current (High / Low) |
-24 / 24 |
mA |
| Propagation Delay (max, 5V, 50pF) |
7 – 10 |
ns |
| Quiescent Current |
4 (typ) |
µA |
| Logic Level – Low (VIL max) |
0.9 – 1.65 |
V |
| Logic Level – High (VIH min) |
2.1 – 3.85 |
V |
| Operating Temperature Range |
-40 to +85 |
°C |
Core Features & Advantages
The MC74AC04DG delivers six independent CMOS inverter gates in a single SOIC-14 package, providing robust logic inversion with high output drive capability across a wide voltage range.
- Primary Function: Hex inverter performing Boolean NOT operation across six independent channels, used for signal inversion, level restoration, and clock buffering.
- Advantages:
- High Output Drive (±24 mA): AC-family CMOS output stage delivers significantly higher current than HC-series equivalents, capable of driving multiple TTL loads or long PCB traces without additional buffers.
- Wide Supply Range (2V-6V): Operates across the full CMOS voltage span, enabling mixed 3.3V/5V system designs without level-shifting — ideal for legacy and modern logic coexistence.
- Low Power CMOS: Typical quiescent current of just 4 µA per gate makes this device suitable for always-on logic paths where power budget is constrained.
Typical Application Scenarios
- Industry: Industrial Control / Consumer Electronics / Communications
- Equipment: Digital signal processing boards, clock distribution networks, logic glitch correction circuits, MCU peripheral interfacing
- Use Cases:
- Inverting active-low enable signals to active-high (or vice versa) in MCU-based motor control and power management circuits.
- Clock signal buffering and polarity inversion in digital backplane designs where clock tree timing requires both rising and falling edge references.
- Logic level restoration and signal conditioning for noisy digital lines between CPLD/FPGA I/O banks and off-board connectors.
Market Reference Price
| Market |
Price Range |
Currency |
| Huaqiangbei Spot |
$0.10 – $0.30 |
USD |
| Overseas B2B |
$0.25 – $0.56 |
USD |
Related Models Comparison
| Model |
Difference |
Application |
| 74HC04D |
HC-family, lower drive (±5.2 mA), same pinout |
Low-power logic inversion in battery-operated devices |
| 74ACT04 |
ACT-family, TTL-compatible inputs, same high drive |
Interfacing TTL-level outputs to CMOS logic loads |
| SN74LVC1G04 |
Single-gate version (SOT-23/SC-70), 1.65-5.5V |
Space-constrained single inverter in portable designs |
