Basic Product Information
Part Number: 74HC595D
| Field |
Value |
| Manufacturer |
Nexperia (originally NXP / Philips) |
| Device Type |
74HC595D |
| Package |
SO16 (SOT109-1), 3.9mm body width, 1.27mm pitch |
| Compliance |
RoHS3 / REACH Unaffected |
| Grade |
Industrial (-40°C to +125°C) |
| Series |
74HC595 / 74HCT595 |
| Product Status |
Active (74HC595D,118); Obsolete (74HC595D,112) |
| MSL |
MSL 1 – Unlimited |
| ECCN |
EAR99 |
Core Electrical Parameters
| Parameter |
Value |
Unit |
| Function |
8-bit serial-in / serial or parallel-out shift register with output latches |
– |
| Logic Family |
74HC (CMOS input levels) |
– |
| Number of Elements |
1 |
– |
| Bits per Element |
8 |
– |
| Supply Voltage (VCC) |
2.0 ~ 6.0 |
V |
| Output Type |
3-State (high-impedance when OE = HIGH) |
– |
| Output Drive Capability |
±7.8 |
mA |
| Propagation Delay (tpd) |
16 (typ.) @ 5V, CL = 50pF |
ns |
| Maximum Shift Frequency (fmax) |
108 (typ.) @ 5V |
MHz |
| Setup Time (DS to SHCP) |
3.0 (min) @ 5V |
ns |
| Minimum Pulse Width (SHCP/STCP) |
5.0 (min) @ 5V |
ns |
| Quiescent Supply Current (ICC) |
4.0 (max) @ 25°C |
µA |
| Operating Temperature |
-40 ~ +125 |
°C |
| ESD Protection (HBM) |
> 2000 |
V (JESD22-A114) |
| ESD Protection (CDM) |
> 1000 |
V (JESD22-A002) |
| Latch-Up Immunity |
> 100 |
mA (JESD 78 Class II Level B) |
| Package Dimensions |
10.0 x 3.9 x 1.75 |
mm |
| Pin Count |
16 |
– |
Pin Configuration (SO16)
| Pin |
Name |
Function |
| 1 |
Q1 |
Parallel output bit 1 |
| 2 |
Q2 |
Parallel output bit 2 |
| 3 |
Q3 |
Parallel output bit 3 |
| 4 |
Q4 |
Parallel output bit 4 |
| 5 |
Q5 |
Parallel output bit 5 |
| 6 |
Q6 |
Parallel output bit 6 |
| 7 |
Q7 |
Parallel output bit 7 |
| 8 |
GND |
Ground (0V) |
| 9 |
Q7S |
Serial data output (cascading) |
| 10 |
MR |
Master reset (active LOW) |
| 11 |
SHCP |
Shift register clock input |
| 12 |
STCP |
Storage register clock input (latch) |
| 13 |
OE |
Output enable (active LOW) |
| 14 |
DS |
Serial data input |
| 15 |
Q0 |
Parallel output bit 0 |
| 16 |
VCC |
Supply voltage |
Core Features & Advantages
The 74HC595D is Nexperia’s 8-bit serial-in / serial-or-parallel-out shift register with separate storage register latches and 3-state outputs in a SO16 package — the industry-standard “I/O expander” chip that converts 3 MCU pins (DS, SHCP, STCP) into 8 parallel outputs, cascadable to any multiple of 8 via the Q7S serial output pin.
- Primary Function: 8-bit shift register with output latches, 2V–6V supply, 108 MHz max shift frequency, 3-state outputs, dual-clock architecture (SHCP for shift, STCP for latch), active-LOW master reset, active-LOW output enable, cascadable via Q7S, SO16 surface-mount package.
- Advantages:
- Dual-Clock Architecture (SHCP + STCP) — Glitch-Free Output Updates: The 74HC595D separates the shift register clock (SHCP) from the storage register clock (STCP). Data shifts into the shift register on SHCP rising edges, but the parallel outputs Q0–Q7 only update when STCP rises — transferring the shift register contents to the storage register in a single snapshot. This eliminates output glitches during data shifting, a critical advantage over single-clock shift registers where outputs toggle with every clock edge as bits ripple through. For LED multiplexing and display drivers, this means no visible flicker during data updates.
- 3-State Outputs with OE Control — Bus Sharing and Display Multiplexing: The active-LOW OE pin places all 8 outputs in a high-impedance state, allowing multiple 74HC595D devices to share the same output bus without contention. In LED matrix displays, OE is toggled at the row scan rate — enabling one set of shift registers to drive multiple rows via time-division, reducing driver IC count by 50% or more. OE does not affect the internal register state, so outputs resume their previous levels when re-enabled without re-shifting data.
- Unlimited Cascading via Q7S — 3-Pin Control for Unlimited Outputs: The Q7S pin outputs the 8th bit of the shift register, serving as the data input for the next cascaded 74HC595D. By connecting Q7S to the DS pin of the next device and sharing SHCP/STCP across all devices, a single 3-wire SPI interface (DS, SHCP, STCP) can control 8, 16, 24, 32… outputs — limited only by PCB routing and clock skew. At 108 MHz shift frequency, updating 1000 outputs (125 cascaded devices) takes under 10 µs, fast enough for 60 Hz LED refresh rates with 16-bit color depth per LED.
Typical Application Scenarios
- Industry: Consumer Electronics / Industrial / Automotive / Maker / IoT
- Equipment: LED matrix displays, 7-segment display drivers, relay boards, stepper motor drivers, GPIO expanders, keypad scanners, home automation controllers
- Use Cases:
- LED Matrix Display Driver (Cascaded Shift Registers): Multiple 74HC595D devices are cascaded to drive an LED matrix — one shift register per row (or column) of 8 LEDs. For a 32×8 display, four cascaded 74HC595Ds control 32 columns while a 3-to-8 decoder drives the 8 rows. The MCU shifts out 32 bits of column data via SPI, latches with STCP, then enables the next row. At 108 MHz shift clock, the entire 32-bit column update takes under 300 ns, leaving over 99% of the 2 ms frame time for row scanning. The OE pin enables PWM dimming by toggling at ultrasonic frequency (>20 kHz), controlling LED brightness with a single GPIO and a timer interrupt.
- Industrial Relay Board Driver (8-Channel Galvanic Isolation): A single 74HC595D drives 8 relay coils through NPN transistor buffers (e.g., BC847BLT1G). The MCU sends relay states serially over 3 wires instead of 8 parallel GPIO — freeing 5 pins on a 28-pin MCU for other functions. The latch mechanism ensures all relays switch simultaneously when STCP pulses, preventing sequential turn-on that could cause ground bounce or power supply droop. The OE pin enables an emergency relay-off function: pulling OE HIGH instantly tri-states all outputs, turning off all relays in under 100 ns without MCU intervention.
- GPIO Expander for I/O-Constrained MCU: In cost-optimized designs using 8-pin or 14-pin MCUs (e.g., ATtiny85, STM32G031F4), the 74HC595D provides 8 additional output pins at the cost of 3 MCU pins — a net gain of 5 outputs. Multiple boards can share the same SPI bus (shared SHCP/STCP, individual DS from different MCU pins or addressable via a pre-shift protocol), enabling modular I/O expansion in building automation and lighting control systems.
Market Reference Price
| Market |
Price Range |
Currency |
| Farnell (74HC595D,118) |
€0.905 (5 pcs) / €0.255 (1,000+ pcs) |
EUR |
| DigiKey (74HC595D,118) |
$0.250 (CT, similar sub) |
USD |
| Huaqiangbei Spot |
¥0.15 ~ ¥0.50 |
CNY |
Note: The 74HC595D,112 (tube packaging) is Obsolete — use 74HC595D,118 (tape & reel) for new designs. Multiple manufacturers produce pin-compatible equivalents (Nexperia, Toshiba, TI, STMicroelectronics), ensuring robust multi-source availability.
Related Models Comparison
| Model |
Difference |
Application |
| 74HCT595D |
Same function, TTL input levels (1.5V VIH), 4.5–5.5V only |
5V TTL/CMOS mixed systems |
| 74HC595PW |
Same die, TSSOP16 package (4.4mm wide, thinner) |
Space-constrained designs |
| 74HC595BQ |
Same die, DHVQFN16 (2.5×3.5mm, no leads) |
Ultra-compact layouts |
| 74AHC595D |
Advanced HC: faster (170 MHz @ 5V), wider temp |
Higher-speed shift register applications |
| CD74HC595DW (TI) |
Pin-compatible TI equivalent |
Second-source / dual-sourcing |
| TPIC6B595 (TI) |
Power shift register: 50V, 150mA per output, open-drain |
Direct LED/relay driving without external transistors |
