TPS51200DRC – TI Sink/Source DDR Termination Regulator VSON-10

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June 14, 2026

Basic Product Information

Part Number: TPS51200DRC

Field Value
Manufacturer Texas Instruments
Device Type Sink and Source DDR Termination Regulator (VTT LDO)
Package VSON-10 (DRC, 3.0 x 3.0mm with PowerPAD)
Compliance RoHS / REACH
Grade Commercial (-40 to +85°C)

Core Electrical Parameters

Parameter Value Unit
VDDQ Input Voltage (VLDOIN) 1.1 to 2.3 V
VLDOIN Supply Voltage 2.375 to 3.5 V
Output Voltage (VTT) 0.5 x VDDQ (tracking) V
VTT Output Accuracy ±10 mV
Continuous Output Current (sink + source) ±1.5 A
Peak Output Current (sink + source) ±2.5 A
VLDOIN Quiescent Current (typ) 430 μA
Shutdown Current (typ) 2 μA
Droop Compensation Yes (adjustable via external resistor)
Power Good Output Yes
Soft-Start Internal (1.5ms typ)
Current Limit Yes (foldback)
Thermal Shutdown Yes
VREF (Reference Output) Yes (VDDQ/2 buffered)
Operating Temperature -40 to +85 °C

Core Features & Advantages

The TPS51200DRC delivers a dedicated DDR/DDR2/DDR3 VTT termination regulator capable of sourcing and sinking ±1.5A continuous current while tracking VDDQ/2 with ±10mV accuracy.

  • Primary Function: DDR memory termination voltage (VTT) regulator that tracks VDDQ/2 and provides bidirectional (sink/source) current for DDR/DDR2/DDR3/DDR3L termination bus.
  • Advantages:
    • Bidirectional ±1.5A continuous / ±2.5A peak — single-chip solution replaces separate source LDO + sink LDO, halving BOM and PCB area for VTT regulation.
    • VDDQ/2 tracking with ±10mV accuracy — tight VTT centering minimizes DDR timing margin degradation and improves memory interface signal integrity.
    • Adjustable droop compensation — external resistor programs output impedance to match PCB trace impedance, improving DDR signal integrity under transient load steps.

Typical Application Scenarios

  • Industry: Computing / Server / Consumer / Networking
  • Equipment: DDR3/DDR3L memory modules, servers, laptops, embedded computing platforms
  • Use Cases:
    • DDR3 VTT termination rail generation (VDDQ=1.5V → VTT=0.75V) with ±1.5A source/sink for server memory DIMM arrays.
    • DDR3L low-power memory VTT (VDDQ=1.35V → VTT=0.675V) in laptops and embedded computing platforms.
    • DDR2 VTT bus termination (VDDQ=1.8V → VTT=0.9V) with integrated VREF output for reference distribution.

Market Reference Price

Market Price Range Currency
Huaqiangbei Spot $0.80 – $1.50 USD
Overseas B2B $1.20 – $2.80 USD

Related Models Comparison

Model Difference Application
TPS51200ADRC Wider VLDOIN range (1.1V–2.3V VDDQ support for DDR4), enhanced accuracy DDR4 memory VTT termination requiring lower VDDQ tracking
TPS51116 4A VTT LDO + integrated VDDQ switch, higher current in QFN-20 High-density server memory requiring >1.5A VTT and VDDQ switching
RT9199-18GB Fixed 0.9V VTT LDO (DDR2 only), lower cost, simpler but no tracking Cost-sensitive DDR2-only designs with fixed VTT requirement

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