Basic Product Information
The SN74LVC138APWR is a 3-line to 8-line decoder/demultiplexer manufactured by Texas Instruments. Designed for 1.65V to 3.6V VCC operation, this device is optimized for high-performance memory-decoding and data-routing applications requiring very short propagation delay times. The decoder features three binary-select inputs (A, B, C) and three enable inputs (two active-low G1, G2A and one active-high G2B), which select one of eight mutually exclusive active-low outputs. The multiple enable inputs reduce the need for external gates or inverters when expanding — a 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. Inputs accept voltages up to 5.5V, allowing the device to function as a translator in mixed 3.3V/5V systems. Housed in a 16-pin TSSOP package, the SN74LVC138APWR supports operating temperatures from -40°C to +85°C and offers latch-up performance exceeding 250 mA per JESD 17.
Core Electrical Parameters
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Logic Function | 3-to-8 Decoder / Demultiplexer |
| Logic Family | 74LVC |
| Technology | CMOS |
| Number of Decoders | 1 |
| Inputs | 3 select (A, B, C) + 3 enable (G1 active-high, G2A/G2B active-low) |
| Outputs | 8 (active-low) |
| Supply Voltage | 1.65V ~ 3.6V |
| Input Voltage Tolerance | Up to 5.5V |
| Propagation Delay (tpd) | 5.8 ns (max @ 3.3V) |
| Output Current (High/Low) | -24 mA / 24 mA |
| Quiescent Current (ICC) | 10 µA (max) |
| Input Clamp Current | -50 mA |
| Output Ground Bounce (VOLP) | < 0.8V (typ. @ VCC=3.3V, TA=25°C) |
| Output VOH Undershoot (VOHV) | > 2V (typ. @ VCC=3.3V, TA=25°C) |
| ESD Protection | > 2000V HBM, > 200V MM |
| Latch-Up Performance | > 250 mA (JESD 17) |
| Operating Temperature | -40°C ~ +85°C |
| Package | TSSOP-16 (4.40mm width) |
| Bandwidth | 100 MHz |
| Turn-On Delay Time | 22 ns |
| Package Quantity | 2,000 pcs/reel |
| ECCN | EAR99 |
Core Features & Advantages
The SN74LVC138APWR delivers several design advantages for logic and address decoding:
- Minimal Propagation Delay: 5.8 ns maximum at 3.3V ensures the decoder introduces negligible system delay, making it suitable for high-performance memory address decoding where decoder latency must be less than memory access time.
- Over-Voltage Tolerant Inputs: Inputs accept voltages up to 5.5V regardless of VCC, enabling seamless integration in mixed 3.3V/5V system environments without additional level-shifting components.
- Three Enable Inputs for Easy Expansion: Two active-low and one active-high enable inputs allow cascading without external logic gates — a 24-line decoder requires no external inverters, and a 32-line decoder needs only one.
- Demultiplexing Capability: An enable input can serve as a data input, allowing the device to function as a 1-to-8 demultiplexer for data routing applications.
- Low Ground Bounce: Typical VOLP below 0.8V at 3.3V ensures signal integrity in high-speed switching environments, reducing false triggering in downstream logic.
- Robust ESD and Latch-Up Protection: Greater than 2000V HBM ESD rating and 250 mA latch-up immunity provide reliability in industrial and automotive environments.
Typical Application Scenarios
- Memory Address Decoding: Chip-select generation for multiple memory devices in processor-based systems, where fast decoding minimizes memory access latency.
- I/O Port Expansion: Enabling selection among multiple peripheral devices from a 3-bit address bus, reducing MCU GPIO requirements.
- Data Demultiplexing: Routing a single data stream to one of eight output channels using the enable input as data input.
- Display Digit Selection: Multiplexed display digit enable control in LED and LCD panel drivers, selecting one of eight digit positions.
- Interrupt Vector Encoding: Encoding interrupt sources in embedded systems where multiple interrupt lines must be decoded to a unique chip-select for service routine dispatch.
- 3.3V/5V Mixed-Voltage Systems: Bridge decoding between 5V logic domains and 3.3V subsystems using the 5.5V input tolerance without additional level shifters.
Market Reference Price
| Quantity | Unit Price (USD) |
|---|---|
| 100 pcs | $0.152 |
| 500 pcs | $0.133 |
| 1,000 pcs | $0.123 |
| 10,000 pcs | $0.112 |
Source: Farnell pricing (EUR converted to USD), as of 2025. Prices may vary by distributor and quantity tier.
Related Models Comparison
| Feature | SN74LVC138APWR | SN74HC138PW | 74HC138D | SN74LVC138AQPWRQ1 |
|---|---|---|---|---|
| Manufacturer | TI | TI | Nexperia | TI |
| Supply Voltage | 1.65V ~ 3.6V | 2V ~ 6V | 2V ~ 6V | 2V ~ 3.6V |
| tpd (max @ 3.3V) | 5.8 ns | ~15 ns | ~13 ns | 5.8 ns |
| 5V Input Tolerance | Yes (5.5V max) | Yes (6V max) | Yes (6V max) | Yes (5.5V max) |
| Output Current | ±24 mA | ±5.2 mA | ±5.2 mA | ±24 mA |
| Operating Temp. | -40°C ~ +85°C | -40°C ~ +85°C | -40°C ~ +125°C | -40°C ~ +125°C |
| AEC-Q100 | No | No | No | Yes |
| Package | TSSOP-16 | TSSOP-16 | SOIC-16 | TSSOP-16 |